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BD7844AEFV
● Block Diagram
I2CSEL
VDD
NDMOS Output
（ Sink Type ）
Datasheet
A0
A1
A2
Logic
Enable
PWM0
PWM1
OU T0
A3
SDA
SCL
I2C F ilter
OUT1
RESETB
POR
TSD
16MHz
VCO
RESETB
PWM15
OUT15
GND
GND
GND
Notes on using BD7844AEFV
? Please do not make output terminal current per one terminal exceed 80mA by putting current limit resistor for open drain
output terminal from OUT0 to OUT15. Output terminal current ILEDmax formulate by the following.
ILEDmax[A] = ( VLED[V] – Vf[V] ) / (RC[ Ω ] + RON[ Ω ] ) ＜ 0.080[A]
VLED
RC
Vf
ILEDmax
RON
? Low output drive ability of SDA terminal becomes high, which cause undershoot noise at Low output. It is possible to
remove undershoot noise by inserting damping resistor as close as SDA terminal.
? It is recommended that power supply VDD and LED power supply VLED should be used with separated power supply. If
using both VDD and VLED with common power supply, malfunction might be occurred by transmitting noise associated
with PWM signal of open drain output terminal from VLED wiring to VDD wiring.
In case of using VDD and VLED with common power supply, please insert bypass capacitor as close as VDD terminal
after separating VDD wiring and VLED wiring from the end in order to make common impedance minimum. In addition,
please insert bypass capacitor on VLED wiring as necessary in order to prevent noise of VLED wiring side from being
transmitted to VDD side as much as possible.
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
5/14
TSZ02201-0G3G0CZ00310-1-2
15.Oct.2012 Rev.001
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